Publications

Full list of publications can be found in my google scholar

Selected Journal Papers

* indicates equal contribution, ^ indicates corresponding author

2023

[J9]	Shuanglong Liu, Hongxiang Fan , Wayne Luk. “Design of Fully Spectral CNNs for Efficient FPGA-based Acceleration”, to appear in the IEEE Transactions on Neural Networks and Learning Systems (TNNLS, IF:12.51), 2023.
[J8]	He Li, Jiawei Liang, Hongxiang Fan, Yongming Tang. “Design Space Exploration for Efficient Quantum Most-Significant Digit-First Arithmetic”, to appear in the IEEE Transactions on Computers (TC), 2023.

2022

[J7]	Hongxiang Fan, Martin Ferianc, Zhiqiang Que, Shuanglong Liu, Xinyu Niu, Miguel Rodrigues, Wayne Luk. “FPGA-based Acceleration for Bayesian Convolutional Neural Networks”, to appear in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022.
[J6]	Hongxiang Fan, Martin Ferianc, Zhiqiang Que, Xinyu Niu, Miguel Rodrigues, Wayne Luk. “Optimizing Bayesian Neural Networks via Algorithmic and Hardware Optimizations”, to appear in the IEEE Transactions on Parallel and Distributed Systems (TPDS), 2022.
[J5]	Zhiqiang Que, Hiroki Nakahara, Hongxiang Fan, He Li, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Eriko Nurvitadhi, Wayne Luk. “Remarn: A Reconfigurable Multi-threaded Multi-core Accelerator for Recurrent Neural Networks”, ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2022.
[J4]	Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Andrew Boutros, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Wayne Luk. “Recurrent Neural Networks with Column-wise Matrix-Vector Multiplication on FPGAs”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI), Vol 30, Issue 2, February,2022.

2021

[J3]	Hongxiang Fan, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk. “High-Performance Acceleration of 2D and 3D CNNs on FPGAs using Static Block Floating-Point”, IEEE Transactions on Neural Networks and Learning Systems (TNNLS, IF:12.51), 2021.
[J2]	Shuanglong Liu, Hongxiang Fan, Martin Ferianc, Xinyu Niu, Huifeng Shi, and Wayne Luk. “Toward Full-Stack Acceleration of Deep Convolutional Neural Networks on FPGAs”, IEEE Transactions on Neural Networks and Learning Systems (TNNLS, IF:12.51), 2021.

2018

[J1]	Shuanglong Liu, Hongxiang Fan, Xinyu Niu, Ho-cheung Ng, Yang Chu, Wayne LUK. “Optimizing CNN-based Segmentation with Deeply Customized Convolutional and Deconvolutional Architectures”, ACM Transactions on Reconfigurable Technology and Systems (TRETS), Vol 11, Issue 3, September, 2018.

Selected Conference Papers

* indicates equal contribution, ^ indicates corresponding author

2024

[C22]

Yuan Li, Jianbin Zhu, Yao Fu, Yu Lei, Toshio Nagata, Ryan Braidwood, Haohuan Fu, Juepeng Zheng, Wayne Luk, Hongxiang Fan^. “Circular Reconfigurable Parallel Processor for Edge Computing”, to appear in the 51st International Symposium on Computer Architecture, 2024 (ISCA’24).

[C21]

Zehuan Zhang, Hongxiang Fan^, et al. “Hardware-Aware Neural Dropout Search for Reliable Uncertainty Prediction on FPGA”, to appear in the proceedings of Design Automation Conference, 2024 (DAC’24).

[C20]

Wanru Zhao, Royson Lee, Yihong Chen, Xinchi Qiu, Yan Gao, Hongxiang Fan, Nicholas Donald Lane. “Breaking Physical and Linguistic Borders: Multilingual Federated Prompt Tuning for Low-Resource Languages”, to appear in the proceedings of International Conference on Learning Representations, 2024 (ICLR’24).

2023

[C19]

Hongxiang Fan, et al. “Sparse-DySta: Sparsity-Aware Dynamic and Static Scheduling for Sparse Multi-DNN WorkloadsA”, to appear in the 56th ACM/IEEE International Symposium on Microarchitecture (MICRO’23).

[C18]

Hongxiang Fan, et al. “When Monte-Carlo Dropout Meets Multi-Exit: Optimizing Bayesian Neural Networks on FPGA”, to appear in the proceedings of Design Automation Conference, 2023 (DAC’23).

2022

[C17]	Hongxiang Fan, Thomas Chau, Stylianos Venieris, Royson Lee, Alexandros Kouris, Wayne Luk, Nicholas D. Lane, Mohamed Abdelfattah. “Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design”, to appear in the 55th ACM/IEEE International Symposium on Microarchitecture (MICRO’22).
[C16]	Hongxiang Fan, Ce Guo, Wayne Luk. “Optimizing Quantum Circuit Placement via Machine Learning”, to appear in the proceedings of the Design Automation Conference, 2022 (DAC’22).
[C15]	Hongxiang Fan, Martin Ferianc, Wayne Luk. “Enabling Fast Uncertainty Estimation by Accelerating Bayesian Transformers”, to appear in the proceedings of the Design Automation Conference, 2022 (DAC’22).
[C14]	Ziwei Wang, Zhiqiang Que, Wayne Luk, Hongxiang Fan^. “Customizable FPGA-based Accelerator for Binarized Graph Neural Networks”, to appear in the proceedings of the IEEE International Symposium on Circuits and Systems, 2022 (ISCAS’22).
[C13]	Hongxiang Fan, Martin Ferianc, Zhiqiang Que, Shuanglong Liu, Xinyu Niu, Wayne Luk. “Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator”, in the proceedings of the Asia and South Pacific Design Automation Conference, 2022 (ASP-DAC’22).

2021

[C12]

Martin Ferianc, Zhiqiang Que, Hongxiang Fan, Wayne Luk, Miguel Rodrigues. “Optimizing Bayesian Recurrent Neural Networks on an FPGA-based Accelerator”, in the proceedings of the IEEE International Conference on Field-Programmable Technology, 2021 (FPT’21).

[C11]

Shuanglong Liu, Hongxiang Fan, Wayne Luk. “Accelerating Fully Spectral CNNs with Adaptive Activation Functions”, in the proceedings of the Design, Automation and Test in Europe Conference and Exhibition, 2021 (DATE’21).

[C10]

Hongxiang Fan*, Martin Ferianc*, Miguel Rodrigues, Hongyu Zhou, Xinyu Niu, Wayne Luk. “High-Performance FPGA-based Accelerator for Bayesian Neural Networks”, in the proceedings of the Design Automation Conference, 2021 (DAC’21).

2020

[C9]	Hongxiang Fan, Martin Ferianc, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk. “Optimizing FPGA-Based CNN Accelerator Using Differentiable Neural Architecture Search”, in the proceedings of the IEEE International Conference on Computer Design, 2020 (ICCD’20).

[C8]

Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Xinyu Niu, Wayne Luk. “Optimizing Reconfigurable Recurrent Neural Networks”, in the proceedings of the IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020 (FCCM’20).

[C7]	Zhiqiang Que, Hongxiang Fan, Jiuxi Meng, Xinyu Niu, Wayne Luk. “CGM-LSTM: A Coarse-Grained Multi-LSTM Accelerator Architecture on A Single FPGA”, in the proceedings of the IEEE International Conference on Field-Programmable Technology, 2020 (FPT’20).

2019

[C6]	Hongxiang Fan, Martin Ferianc, Wayne Luk. “Static Block Floating-Point Quantization for Convolutional Neural Networks on FPGA”, in the proceedings of the IEEE International Conference on Field-Programmable Technology, 2019 (FPT’19).

[C5]

Hongxiang Fan, Cheng Luo, Chenglong Zeng, Martin Ferianc, Zhiqiang Que, Shuanglong Liu, Xinyu Niu, Wayne Luk. “F-E3D: FPGA-based Acceleration of An Efficient 3D Convolutional Neural Networkfor Human Action Recognition”, in the proceedings of the IEEE International Conference on Application-specific Systems, Architectures and Processors, 2019 (ASAP’19), Best Paper Nomination.

2018

[C4]	Hongxiang Fan, Martin Ferianc, Wayne Luk. “A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA”, in the proceedings of the IEEE International Conference on Field-Programmable Technology, 2018 (FPT’18), Best Paper Nomination.

[C3]	Shuanglong Liu, Chenglong Zeng, Hongxiang Fan, Wayne Luk. “Memory-Efficient Architecture for Accelerating Generative Networks on FPGAs”, in the proceedings of the IEEE International Conference on Field-Programmable Technology, 2018 (FPT’18).

[C2]	Hongxiang Fan, Ho-cheung Ng, Wayne Luk. “Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation”, in the proceedings of the IEEE International Conference on Field Programmable Logic and Applications, 2018 (FPL’18).

2017

[C1]	Hongxiang Fan, Xinyu Niu, Qiang Liu, Wayne Luk. “F-C3D: FPGA-based 3-Dimensional Convolutional Neural Network”, in the proceedings of the IEEE International Conference on Field Programmable Logic and Applications, 2017 (FPL’17).